Processor Interconnections & Memory Models of Processing Units

ABSTRACT

This article aims at providing the information about how the number of processors are connected on a die for achieving better performance by the vendor companies like Intel and AMD. Moreover, the information about the memory model is also addressed. All the discussion is done on state of the art devices.  

TERMS AND ABBREVIATIONS

GPU                Graphics Processing Unit                               

DSM               Distributed Shared Memory

QPI                 Quick Path Interconnection                           

Multi-core       Having two, four, six or eight independent cores on the same die [1].

Many-core      Having sixteen up to thousands of cores on the same physical die.

INTRODUCTION

Initial step taken to increase the processing speed was increase in the number of cycles a processing unit performs in a unit time. It’s practical up to a certain limit due to the factor of heat dissipation. So, the next step to increase the processing speed was increase in the number of physical processing units in the same die. Processing device manufacturers adopt this way and move towards the two physical processors on the same die and then go to four and now; in GPUs, thousands of processors are replicated on the same die to achieve massive parallelism.

Due to many processors on the same physical die, tasks can be performed in parallel fashion to achieve speed up. As every new technology comes up with some tradeoffs, in many of the cases. This realm has no exception with this rule. So, the overhead here is the communication cost that we have to bear in form of time delays while communicating one task to the many/multi processors.

To overcome these time delays, there came some numerous ways to connect these processors on the die so that communication cost can be minimized. Moreover, type of memory model also has a considerable impact on processing speed. In this article we are going to discuss processor interconnection and memory models adopted by the Intel and AMD in their multi-processor architectures.

RESULTS

Following chart is depicting the state of the art architecture constraints adopted by the Intel and AMD.

State of the Art Multi-Core Processors
Brand Name	Model	No of Physical Cores	Frequency of Each Unit	Memory Model	Interconnection Technique	References
Intel	Core i7 920	4	2.66 GHz	Distributed Shared Memory (DSM)	QPI (Quick Path Interconnect)	[2]
AMD	​FX 8370 Wraith cooler	8	4.0/4.3 GHz	Shared memory	AMD HyperTransport Technology	[3]

TECHNIQUES

The different techniques used by the vendors are as follows with a brief description.

Distributed Shared Memory (DSM)

In this memory model, memory modules are physically distributed but they have a facility to point at the same memory address that is logically shared [4].

Quick Path Interconnect (QPI)

Quick Path Interconnection is a point to point processor interconnection that helps in parallel transfer of data among the processors [5].

Figure: Intel^® QuickPath Interconnect

Shared Memory

In this type of memory model, one physical memory module is shared among the different processors in multi-processor environment [6].

Figure: Shared Memory System of Three Processors

AMD HyperTransport Technology

This technology is designed using point to point links to increase communication speed between the processors integrated on the same physical ship. This technology has its unique features [7]. AMD and a non-profit corporation collaboratively invented this technology [8].

DISCUSSION

It can be seen that both the Intel and AMD are following point to point interconnection as a base interconnection technique in their multi-processor architectures. As a result, they are achieving high speed with low latency rate.

REFERENCES

[1]	"Multi-core or Many-core Processors discussed by Argon Design," [Online]. Available: http://www.argondesign.com/news/2012/sep/11/multicore-many-core/. [Accessed 31 October 2016].
[2]	P.Sangeetha and M. M. Mythili, "FEATURES OF INTEL CORE i7 PROCESSORS," International Journal of Engineering Research and General Science, vol. 3, no. 2, p. 6, 2915.
[3]	"FX Processors | AMD," AMD, [Online]. Available: http://www.amd.com/en-us/products/processors/desktop/fx.
[4]	"Distributed shared memory," [Online]. Available: https://en.wikipedia.org/wiki/Distributed_shared_memory. [Accessed 31 October 2016].
[5]	I. Corporation, "An Introduction to the Intel® QuickPath Interconnect," January 2009. [Online]. Available: http://www.intel.com/content/www/us/en/io/quickpath-technology/quick-path-interconnect-introduction-paper.html. [Accessed 31 October 2016].
[6]	"Shared Memory," [Online]. Available: https://en.wikipedia.org/wiki/Shared_memory. [Accessed 31 October 2016].
[7]	A. Corporation, "AMD HyperTransport™ Technology," [Online]. Available: http://www.amd.com/en-us/innovations/software-technologies/hypertransport. [Accessed 31 October 2016].
[8]	"HT Consortium," [Online]. Available: http://www.hypertransport.org. [Accessed 31 October 2016].